1. Field of Invention
The present invention relates to a semiconductor process, and more particularly to a method of forming a shallow trench isolation structure.
2. Description of Related Art
As the device dimension continues to shrink and the level of integration continues to increase, a structure for isolating devices is required to reduce accordingly. Since a shallow trench isolation (STI) structure is scalable without causing any bird's beak encroachment problem as in the conventional local oxidation of silicon (LOCOS) process, it is the preferred isolation technique for a sub-micron (or smaller dimension) metal-oxide-semiconductor fabrication process.
In addition, the required depths of isolation structures are varied according to different applications in the same chip. For example, in a fin-type field effect transistor (FinFET) device, the depth of a STI structure for fins may be different from that for well regions. However, it has been difficult and complicated to fabricate such dual isolation structures having different depths.